| Cadence
Assura |
Official Cadence Web page |
| Mixed
Signal SOC design flow |
Mentor Mixed signal design flow doc
|
ICH
|
International cadence Usergroup
|
| Cadence
Tools Docs |
Online Cadence tool pdf files. |
| Synopsys
Nanosim doc |
Online Synopsys Nanosim pdf files. |
| Demo
on Demand |
Online demo from service providers |
| DeepChip
EDA group |
Online ESD discussion group. Lot of useful info. |
| OPENCORES |
Open source IP repository |
| Design/IP
Reuse |
Online Design reuse and IP service provider |
| Agilent
Online Demo |
Online Agilent EDA demo |
| Xilinx design
reuse document |
Xilinx design resue Document. |
| TechOnLine |
many useful eduational tools for EE and IT |
Silicon
Integration Initiative
(Si2) |
A organization focuses on improving
productivity and reducing cost in creating and producing integrated
silicon systems. |
Openeda
at SI2.org
|
OpenEDA.Si2.org is a restricted
access site for the distribution of licensed materials from Si2
development groups (councils, projects, boards, or workgroups). |
| OpenAccess |
OpenAccess is a community effort to provide true
interoperability, not just data exchange, among IC design tools through
an open standard data API and reference database supporting that API
for IC design. |
| SoC
Central |
SOCcentral
brings you the latest new about SOC/ASIC/FPGA design, EDA tools, design
methodologies, intellectual property (IP), and design reuse. |
| eg3 |
Online discssion group |
| EDAboard |
Online Analog IC design and layout discussion forum. |
| EEtimes |
Online EEtimes website
|
|
|
| Design-reuse |
Design resue website. |
| IC
Design Quality Checklist |
IC design quality on design magazine. |
